Glossary SCR Gate Triggering Circuits For proper operation of circuits using SCRs, the trigger circuits should supply the firing signal at precisely the correct time to assure turn-on when required. In general, the firing circuit used to trigger an SCR must meet the following criteria: Produce a gate signal of suitable magnitude and sufficiently short rise time Produce a gate signal of adequate duration Provide accurate firing control over the required range Provide accurate firing control over the required range Ensure that triggering does not occur from false signals or noise In AC applications, ensure that the gate signal is applied when the SCR is forward-biased In three phase circuits, provide gate pulses that are O apart with respect to the reference point Ensure simultaneous triggering of SCRs connected in series or in parallel Three basic types of gate-firing signals are normally used: DC signals pulse signals, and AC signals. Triggering requirements are normally provided in terms of DC voltage and current. A trigger pulse that has a magnitude just equal to the DC requirements must have a pulse width that is long enough to ensure that the gate signal is provided during the full turn-on time of the SCR.
|Published (Last):||20 January 2016|
|PDF File Size:||8.99 Mb|
|ePub File Size:||1.50 Mb|
|Price:||Free* [*Free Regsitration Required]|
PDF Version Unijunction transistor: Although a unijunction transistor is not a thyristor, this device can trigger larger thyristors with a pulse at base B1. A unijunction transistor is composed of a bar of N-type silicon having a P-type connection in the middle.
See Figure a. The connections at the ends of the bar are known as bases B1 and B2; the P-type mid-point is the emitter. It varies from 0.
Beyond the peak point, current increases as voltage decreases in the negative resistance region. The voltage reaches a minimum at the valley point. The resistance of RB1, the saturation resistance is lowest at the valley point. Unijunction transistor: a emitter characteristic curve, b model for VP. The relaxation oscillator is an application of the unijunction oscillator. RE charges CE until the peak point. The unijunction emitter terminal has no effect on the capacitor until this point is reached.
Once the capacitor voltage, VE, reaches the peak voltage point VP, the lower emitter-base1 E-B1 resistance quickly discharges the capacitor. Once the capacitor discharges below the valley point VV, the E-RB1 resistance reverts back to high resistance, and the capacitor is free to charge again. Unijunction transistor relaxation oscillator and waveforms. Oscillator drives SCR.
During the capacitor discharge through the E-B1 saturation resistance, a pulse may be seen on the external B1 and B2 load resistors, Figure above.
The load resistor at B1 needs to be low to not affect the discharge time. The external resistor at B2 is optional. It may be replaced by a short circuit.
A more accurate expression for frequency is given in the Figure above. The charging resistor RE must fall within certain limits. It is inexpensive and in production. Though it serves a function similar to the unijunction transistor, the PUT is a three terminal thyristor. The PUT shares the four-layer structure typical of thyristors shown in Figure below. Moreover, the gate lead on the schematic symbol is attached to the anode end of the symbol.
Programmable unijunction transistor: Characteristic curve, internal construction, schematic symbol. The characteristic curve for the programmable unijunction transistor in Figure above is similar to that of the unijunction transistor. This is a plot of anode current IA versus anode voltage VA.
The gate lead voltage sets, programs, the peak anode voltage VP. As anode current increases, voltage increases up to the peak point. Thereafter, increasing current results in decreasing voltage, down to the valley point. The PUT equivalent of the unijunction transistor is shown in Figure below.
Resistor R charges the capacitor until the peak point, then heavy conduction moves the operating point down the negative resistance slope to the valley point. A current spike flows through the cathode during capacitor discharge, developing a voltage spike across the cathode resistors.
After capacitor discharge, the operating point resets back to the slope up to the peak point. PUT relaxation oscillator Problem: What is the range of suitable values for R in Figure above, a relaxation oscillator? The charging resistor must be small enough to supply enough current to raise the anode to VP the peak point while charging the capacitor.
Once VP is reached, anode voltage decreases as current increases negative resistance , which moves the operating point to the valley. It is the job of the capacitor to supply the valley current IV. Once it is discharged, the operating point resets back to the upward slope to the peak point. The resistor must be large enough so that it will never supply the high valley current IP. If the charging resistor ever could supply that much current, the resistor would supply the valley current after the capacitor was discharged and the operating point would never reset back to the high resistance condition to the left of the peak point.
We still need VV, the valley voltage. How much less? This will raise the lower limit on the resistor range a little. Selected 2n PUT parameters, adapted from 2n datasheet.
SCR Triggering using UJT
Subscribe to RSS